[Yaaarc] New 'Propeller' Parallax multi-mpu chip
Keith Mc. (Route-To YAR)
acti at provide.net
Thu May 11 12:09:26 EDT 2006
Parallax has just announced a rather interesting chip
today, the "Propeller":
http://www.parallax.com/propeller/
This is Parallax's first venture into custom silicon. It's an
eight copy 32 bit processor set (made with the Altera Stratix
silicon toolkit), with shared I/O in one small (40 or 44 pin) package.
The intent is that you can run eight processes simultaneously, each
in its own "COG" (MPU) within the chip. In theory, it definitely has
*potential* as a robot controller. You (theoretically) can "easily
separate" tasks like motor, sensor management, RTC timing, number
crunching, planning (et al) all into their own separate processors.
BUT, I'm curious though to see if:
A) Any one COG is really powerful, or if it's too simplistic
and will get swamped with any simple thing like a timer task;
B) If inter-mpu communications and shared I/O is well designed
or cumbersome in reality;
C) The programming for it is so obscure and proprietary it doesn't
make sense to move into it and away from the mainstream MPUs.
Anyone here with multi-mpu app experience want to take a deeper
look at this chip, and let us all know whether or not you feel
they got the design RIGHT?
IOW, is this just a flash in the pan whose apps can be done
BETTER by just multitasking a standard, modern, fast, top end
off the shelf MPU (Amtel, PIC18F, etc.), or is this REALLY a
useful "up and coming" chip, with unique properties that we MAY
wish to try out in a future YAAARC "JanBot-like" project?
Specs Overview:
3.3VDC
Clock - DC to 80 MHz (4 MHz to 8 MHz with Clock PLL running)
Int RC osc - 12 MHz or 20 KHz
Sys clock - DC to 80 MHz
Global RAM/ROM - 64 K bytes; 32K RAM / 32 K ROM
COG RAM - 2 K bytes each
RAM/ROM Org - 32 bits (4 bytes or 1 long)
I/O - 32 pins
Current Source/Sink - 50 mA per I/O pin
(but how much overall on the chip at one time??)
Packages:
P8X32A-D40 (40-pin DIP) chip
P8X32A-Q44 (44-pin QFP) chip
P8X32A-M44 (44-pin QFN) chip
Cost - $25/each, plus tools. ($150 for starter kit)
I'd love to hear a critique from some of our more silicon savvy
and heavy embedded compiler usering members. <grin>
- Keith Mc.
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